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INTEGRATED CIRCUITS
DATA SHEET
TDA9806 Multistandard VIF-PLL and FM-PLL demodulator
Preliminary specification File under Integrated Circuits, IC02 1995 Sep 05
Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
FEATURES * 5 V supply voltage * Gain controlled wide band VIF-amplifier (AC-coupled) * True synchronous demodulation with active carrier regeneration (very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response) * Separate video amplifier for sound trap buffering with high video bandwidth * VIF AGC detector for gain control, operating as peak sync detector for B/G * Tuner AGC with adjustable takeover point (TOP) * AFC detector without extra reference circuit * AC-coupled limiter amplifier for sound intercarrier signal * Alignment-free FM-PLL demodulator with high linearity, switchable de-emphasis for FM * Stabilizer circuit for ripple rejection and to achieve constant output signals. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA9806 SDIP32 DESCRIPTION plastic shrink dual in-line package; 32 leads (400 mil) GENERAL DESCRIPTION
TDA9806
The TDA9806 is an integrated circuit for multistandard vision IF signal processing and FM sound demodulation in TV and VCR sets.
VERSION SOT232-1
1995 Sep 05
2
Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
QUICK REFERENCE DATA SYMBOL VP IP Vi VIF(rms) Vo CVBS (p-p) B-3 S/N (W) IM1.1 IM3.3 H(sup) Vo(rms) THD S/N (W) PARAMETER supply voltage supply current vision IF input signal voltage sensitivity (RMS value) CVBS output signal voltage (peak-to-peak value) -3 dB video bandwidth on pin CVBS weighted signal-to-noise ratio for video intermodulation attenuation at `blue' intermodulation attenuation at `blue' suppression of harmonics in video signal audio output signal voltage for FM (RMS value) total harmonic distortion for FM weighted signal-to-noise ratio for FM B/G standard; 54% modulation 54% modulation 54% modulation f = 1.1 MHz f = 3.3 MHz B/G standard; CL < 20 pF; RL > 1 k; AC load -1 dB video at output CONDITIONS MIN. 4.5 82 - 1.7 7 56 58 58 35 - - - TYP. 5 96 60 2.0 8 60 64 64 40 0.5 0.15 60
TDA9806
MAX. 5.5 110 100 2.3 - - - - - - 0.5 -
UNIT V mA V V MHz dB dB dB dB V % dB
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handbook, full pagewidth
1995 Sep 05
TOP CAGC n.c. 4 n.c. 5 28 n.c. 3 6 19 tuner AGC loop filter TUNER AND VIF-AGC 2 VIF 1 VIF AMPLIFIER FPLL
BLOCK DIAGRAM
Philips Semiconductors
Multistandard VIF-PLL and FM-PLL demodulator
2 x f PC AFC
n.c. 7 25 24 18
n.c. 30
23 AFC DETECTOR
VCO TWD
21
video 1 V (p-p)
VIDEO DEMODULATOR AND AMPLIFIER
n.c. n.c.
32 31 INTERCARRIER MIXER
10
4
TDA9806
VIDEO BUFFER
CVBS 2 V (p-p) Vi(vid)
22
15 INTERNAL VOLTAGE STABILIZER 29 5V 27 26 1/2 VP n.c. n.c. n.c. SIF
MHA054
FM DETECTOR (PLL) AF AMPLIFIER
12
AF
9
8
11
20 5.5
17
16 n.c.
14
13 de-emphasis
Preliminary specification
TDA9806
Fig.1 Block diagram.
Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
PINNING SYMBOL Vi VIF1 Vi VIF2 n.c. n.c. n.c. TADJ TPLL n.c. n.c. Vo CVBS n.c. Vo AF DEEMI DEEMO CDEC n.c. Vi FM n.c. TAGC Vo(int) Vo(vid) Vi(vid) AFC VCO1 VCO2 Cref GND CVAGC VP n.c. n.c. n.c. PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 DESCRIPTION VIF differential input signal voltage 1 VIF differential input signal voltage 2 not connected not connected not connected tuner AGC takeover adjust (TOP) PLL loop filter not connected not connected CVBS output signal voltage not connected audio voltage frequency output de-emphasis input de-emphasis output decoupling capacitor not connected sound intercarrier input voltage not connected tuner AGC output sound intercarrier output voltage composite video output voltage video buffer input voltage AFC output VCO1 reference circuit for 2fPC VCO2 reference circuit for 2fPC
1 2VP
handbook, halfpage
TDA9806
Vi VIF1 Vi VIF2 n.c. n.c. n.c. TADJ TPLL n.c. n.c.
1 2 3 4 5 6 7 8
32 n.c. 31 n.c. 30 n.c. 29 VP 28 C VAGC 27 GND 26 Cref 25 VCO2
TDA9806
9 24 VCO1 23 AFC 22 Vi(vid) 21 Vo(vid) 20 Vo(int) 19 TAGC 18 n.c. 17 Vi FM
MHA053
Vo CVBS 10 n.c. 11 Vo AF 12 DEEM I 13 DEEM O 14 C DEC 15 n.c. 16
reference capacitor
ground VIF AGC capacitor supply voltage not connected not connected not connected Fig.2 Pin configuration.
1995 Sep 05
5
Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
FUNCTIONAL DESCRIPTION Vision IF amplifier The vision IF amplifier consists of three AC-coupled differential amplifier stages. Each differential stage comprises a feedback network controlled by emitter degeneration. Tuner and VIF AGC The AGC capacitor voltage is transferred to an internal IF control signal, and is fed to the tuner AGC to generate the tuner AGC output current (open-collector output). The tuner AGC takeover point can be adjusted. This allows the tuner and the SWIF filter to be matched to achieve the optimum IF input level. The AGC detector charges/discharges the AGC capacitor to the required voltage for setting of VIF and tuner gain in order to keep the video signal at a constant level. Therefore for negative video modulation the sync level of the video signal is detected. Frequency Phase Locked Loop detector (FPLL) The VIF-amplifier output signal is fed into a frequency detector and into a phase detector via a limiting amplifier. During acquisition the frequency detector produces a DC current proportional to the frequency difference between the input and the VCO signal. After frequency lock-in the phase detector produces a DC current proportional to the phase difference between the VCO and the input signal. The DC current of either frequency detector or phase detector is converted into a DC voltage via the loop filter, which controls the VCO frequency. VCO, travelling wave divider and AFC The VCO operates with a resonance circuit (with L and C in parallel) at double the PC frequency. The VCO is controlled by two integrated variable capacitors. The control voltage required to tune the VCO from its free-running frequency to actually double the PC frequency is generated by the Frequency-Phase detector and fed via the loop filter to the first variable capacitor (FPLL). This control voltage is amplified and additionally converted into a current which represents the AFC output signal. At centre frequency the AFC output current is equal to zero. The oscillator signal is divided-by-two with a Travelling Wave Divider (TWD) which generates two differential output signals with a 90 degree phase difference independent of the frequency. Video demodulator and amplifier
TDA9806
The video demodulator is realized by a multiplier which is designed for low distortion and large bandwidth. The vision IF input signal is multiplied with the `in-phase' signal of the travelling wave divider output. The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the video amplifier. The video amplifier is realized by an operational amplifier with internal feedback and high bandwidth. A low-pass filter is integrated to achieve an attenuation of the carrier harmonics. The video output signal is 1 V (p-p) for nominal vision IF modulation. Video buffer For an easy adaption of the sound traps an operational amplifier with internal feedback is used. This amplifier is featured with a high bandwidth and 7 dB gain. The input impedance is adapted for operating in combination with ceramic sound traps. The output stage delivers a nominal 2 V (p-p) positive video signal. Noise clipping is provided. Intercarrier mixer The intercarrier mixer is realized by a multiplier. The VIF amplifier output signal is fed to the intercarrier mixer and converted to intercarrier frequency by the regenerated picture carrier (VCO). The mixer output signal is fed via a high-pass for attenuation of the video signal components.
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
FM detector The FM detector consists of a limiter, an FM-PLL and an AF amplifier. The limiter provides the amplification and limitation of the FM sound intercarrier signal before demodulation. The result is high sensitivity and AM suppression. The amplifier consists of 7 stages which are internally AC-coupled in order to minimize the DC offset and to save pins for DC decoupling. The FM-PLL consists of an integrated relaxation oscillator, an integrated loop filter and a phase detector. The oscillator is locked to the FM intercarrier signal, output from the limiter. As a result of locking, the oscillator frequency tracks with the modulation of the input signal and the oscillator control voltage is superimposed by the AF voltage. The FM-PLL operates as an FM-demodulator. The AF amplifier consists of two parts: 1. The AF preamplifier for FM sound is an operational amplifier with internal feedback, high gain and high common mode rejection. The AF voltage from the PLL demodulator, by principle a small output signal, is amplified by approximately 33 dB. The low-pass characteristic of the amplifier reduces the harmonics of the intercarrier signal at the sound output terminal, at which the de-emphasis network for FM sound is applied. An additional DC control circuit is implemented to keep the DC level constant, independent of process spread. 2. The AF output amplifier (10 dB) provides the required output level by a rail-to-rail output stage. This amplifier makes use of an input selector for switching to FM de-emphasis or mute state, controlled by the mute switching voltage.
TDA9806
Internal voltage stabilizer and 12VP-reference The bandgap circuit internally generates a voltage of approximately 1.25 V, independent of supply voltage and temperature. A voltage regulator circuit, connected to this voltage, produces a constant voltage of 3.6 V which is used as an internal reference voltage. For all audio output signals the constant reference voltage cannot be used because large output signals are required. Therefore these signals refer to half the supply voltage to achieve a symmetrical headroom, especially for the rail-to-rail output stage. For ripple and noise attenuation the 12VP voltage has to be filtered via a low-pass filter by using an external capacitor together with an integrated resistor (fg = 5 Hz). For a fast setting to 12VP an internal start-up circuit is added.
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VP Vi ts(max) V19 Tstg Tamb Ves Notes 1. IP = 110 mA; Tamb = 70 C; Rth j-a = 60 K/W. PARAMETER supply voltage (pin 29) voltage at pins 1 to 7, 12 to 19, 22, 23, 28 and 29 maximum short-circuit time tuner AGC output voltage storage temperature operating ambient temperature electrostatic handling voltage note 2 CONDITIONS maximum chip temperature of 120 C; note 1 0 0 - 0 -25 -20 -300 MIN.
TDA9806
MAX. 5.5 VP 10 13.2 +150 +70 +300 V V s V
UNIT
C C V
2. Charge device model class B: equivalent to discharging a 200 pF capacitor via a 0 series resistor. THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE 60 UNIT K/W
1995 Sep 05
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
TDA9806
CHARACTERISTICS VP = 5 V; Tamb = 25 C; see Table 1 for input frequencies and level; input level Vi IF 1, 2 = 10 mV RMS value (sync-level for B/G); video modulation DSB; residual carrier B/G: 10%; video signal in accordance with "CCIR, line 17"; measurements taken in Fig.10; unless otherwise specified. SYMBOL Supply (pin 29) VP IP Vi VIF(rms) Vi max(rms) Vo(int) supply voltage supply current note 1 4.5 82 - 120 - 5 96 5.5 110 V mA V mV dB PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Vision IF amplifier (pins 1 and 2) input signal voltage sensitivity (RMS value) maximum input signal voltage (RMS value) B/G standard; -1 dB video at output B/G standard; +1 dB video at output 60 200 0.7 100 - 1
internal IF amplitude difference within AGC range; between picture and sound B/G standard; carrier f = 5.5 MHz IF gain control range differential input resistance differential input capacitance DC input voltage see Fig.3 note 2 note 2
GIFcr Ri(diff) Ci(diff) V1,2 fVCO(max) fosc/T V0 ref(rms) fpcCR tacq Vi VIF(rms)
65 1.7 1.2 -
70 2.2 1.7 3.4
- 2.7 2.5 - - 20 130 - 30 70
dB k pF V
True synchronous video demodulator; note 3 maximum oscillator frequency for carrier regeneration oscillator drift as a function of temperature oscillator voltage swing at pins 24 and 25 (RMS value) picture carrier capture range acquisition time VIF input signal voltage sensitivity for PLL to be locked (RMS value; pins 1 and 2) FPLL offset current at pin 7 f = 2fPC oscillator is free-running; IAFC = 0; note 4 B/G standard B/G standard BL = 60 kHz; note 5 maximum IF gain; note 6 125 - 70 1.5 - - 130 - 100 2.0 - 30 MHz ppm/K mV MHz ms V
IFPLL(offset)
note 7
-
-
4.5
A
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA9806
MAX.
UNIT
Composite video amplifier (pin 21; sound carrier off) Vo video(p-p) V21(sync) V21(clu) V21(cll) Ro,21 Iint 21 I21 max(sink) I21 max(source) B-1 B-3 H PSRR output signal voltage (peak-to-peak value) sync voltage level upper video clipping voltage level lower video clipping voltage level output resistance internal DC bias current for emitter-follower maximum AC and DC output sink current maximum AC and DC output source current -1 dB video bandwidth -3 dB video bandwidth suppression of video signal harmonics B/G standard; CL < 50 pF; RL > 1 k; AC load B/G standard; CL < 50 pF; RL > 1 k; AC load CL < 50 pF; RL > 1 k; AC load; note 8a note 2 see Fig.7 B/G standard 0.88 - VP - 1.1 - - 1.6 1.0 2.0 5 7 35 32 1.0 1.5 VP - 1 0.3 - 2.0 - - 6 8 40 35 1.12 - - 0.4 10 - - - - - - - V V V V mA mA mA MHz MHz dB dB
power supply ripple rejection at video signal; grey level; pin 21 B/G standard; see Fig.8
CVBS buffer amplifier (only) and noise clipper (pins 10 and 22) Ri,22 Ci,22 VI,22 Gv V10(clu) V10(cll) Ro,10 Iint 10 Io,10 max(sink) input resistance input capacitance DC input voltage voltage gain upper video clipping voltage level lower video clipping voltage level output resistance DC internal bias current for emitter-follower maximum AC and DC output sink current note 2 B/G standard; note 9 note 2 note 2 2.6 1.4 1.5 6.5 3.9 - - 2.0 1.4 2.4 B/G standard; CL < 20 pF; RL > 1 k; AC load B/G standard; CL < 20 pF; RL > 1 k; AC load 8.4 11 3.3 2 1.8 7 4.0 1.0 - 2.5 - - 11 14 4.0 3.0 2.1 7.5 - 1.1 10 - - - - - k pF V dB V V mA mA mA MHz MHz
Io,10 max(source) maximum AC and DC output source current B-1 B-3 -1 dB video bandwidth -3 dB video bandwidth
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA9806
MAX.
UNIT
Measurements from IF input to CVBS output (pin 10; 330 between pins 21 and 22, sound carrier off) Vo CVBS(p-p) Vo CVBS(sync) Vo Vo(blBG) Gdiff diff B-1 B-3 S/N (W) S/N IM1.1 CVBS output signal voltage note 9 on pin 10 (peak-to-peak value) sync voltage level deviation of CVBS output signal voltage at B/G black level tilt in B/G standard differential gain differential phase -1 dB video bandwidth -3 dB video bandwidth weighted signal-to-noise ratio unweighted signal-to-noise ratio intermodulation attenuation at `blue' intermodulation attenuation at `yellow' IM3.3 intermodulation attenuation at `blue' intermodulation attenuation at `yellow' c(rms) H(sup) H(spur) PSRR residual vision carrier (RMS value) suppression of video signal harmonics spurious elements B/G standard 50 dB gain control 30 dB gain control gain variation; note 10 1.7 - - - - - - 5 7 56 49 58 60 58 59 - 35 40 25 2.0 1.35 - - - 2 1 6 8 60 53 64 66 64 65 2 40 - 28 2.3 - 0.5 0.1 1 5 2 - - - - - - - - 5 - - - V V dB dB % % deg MHz MHz dB dB dB dB dB dB mV dB dB dB
"CCIR, line 330" "CCIR, line 330"
B/G standard; CL < 20 pF; RL > 1 k; AC load B/G standard; CL < 20 pF; RL > 1 k; AC load see Fig.4 and note 11 see Fig.4 and note 11 f = 1.1 MHz; see Fig.5 and note 12 f = 1.1 MHz; see Fig.5 and note 12 f = 3.3 MHz; see Fig.5 and note 12 f = 3.3 MHz; see Fig.5 and note 12 B/G standard; fundamental wave and harmonics note 8a note 8b
power supply ripple rejection at video signal; grey level; pin 10 B/G standard; see Fig.8
VIF-AFC detector (pin 28) I28 tresp charging current discharging current AGC response to an increasing VIF step B/G standard; note 10 B/G standard B/G standard; note 13 0.75 15 - - 1 20 0.05 2.2 1.25 25 0.1 3.5 mA A ms/dB ms/dB
AGC response to a decreasing B/G standard VIF step
1995 Sep 05
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
SYMBOL Tuner AGC (pin 19) Vi(rms) IF input signal voltage for input at pins 1 and 2; minimum starting point of tuner RTOP = 22 k; I19 = 0.4 mA takeover (RMS value) IF input signal voltage for maximum starting point of tuner takeover (RMS value) Vo,19 Vsat,19 VTOP,19/T I19(sink) permissible output voltage saturation voltage variation of takeover point by temperature sink current input at pins 1 and 2; RTOP = 0 ; I19 = 0.4 mA - 2 5 PARAMETER CONDITIONS MIN. TYP.
TDA9806
MAX.
UNIT
mV
50
100
5
mV
from external source; note 2 - I19 = 1.5 mA I19 = 0.4 mA no tuner gain reduction; see Fig.3 V19 = 12 V V19 = 13.2 V maximum tuner gain reduction - - 1.5 - - -
- - 0.03
13.2 0.2 0.07
V V dB/K
- - 2 6
2.5 5 2.6 8
A A mA dB
GIF
IF slip by automatic gain control control steepness I23/f frequency variation by temperature output voltage upper limit output voltage lower limit output source current output sink current residual video modulation current (peak-to-peak value)
tuner gain current from 20 to 80%
AFC circuit (pin 23); see Fig.6 and note 14 S fIF/T Vo,23 Io,23(source) Io,23(sink) I23(p-p) note 15 IAFC = 0; note 5 see Fig.6 see Fig.6 0.5 - VP - 0.6 - 150 150 B/G standard - 0.72 - 1.0 20 A/kHz ppm/K V V A A A
VP - 0.3 - 0.3 200 200 20 0.6 250 250 30
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS - 7.5 - - - 1.5 1.1 3.0 MIN. TYP. - - -
TDA9806
MAX.
UNIT
Intercarrier mixer (B/G standard; pin 20) Vo(rms) B-3 c(rms) Ro,20 VO,20 Iint 20 I20 max(sink) I20 max(source) IF intercarrier level (RMS value) -3 dB intercarrier bandwidth residual sound carrier (RMS value) output resistance DC output voltage DC internal bias current for emitter-follower maximum AC and DC output sink current maximum AC and DC output source current SC upper limit fundamental wave and harmonics note 2 note 16 9 2 - 2.0 1.9 1.5 3.5 mV MHz mV V mA mA mA
25 - - - -
Limiter amplifier (pin 17); note 17 Vi FM(rms) Vi FM(rms) input signal voltage for lock-in (RMS value) input signal voltage (RMS value) allowed input signal voltage (RMS value) Ri,17 VI,17 fi FM(catch) fi FM(hold) tacq input resistance DC input voltage note 2 S+N ------------- = 40 dB N - - - 200 480 - - 300 - 600 2.8 - - - - - 100 400 - 720 - - 4.0 - 3.5 4 V V mV V
FM-PLL detector catching range of PLL holding range of PLL acquisition time upper limit lower limit upper limit lower limit 7.0 - 9.0 - - MHz MHz MHz MHz s
1995 Sep 05
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TDA9806
MAX.
UNIT
FM operation (B/G standard; pin 12); notes 17 and 17a Vo AF12(rms) AF output signal voltage (RMS value) without de-emphasis; short-circuit from pin 13 to pin 14; 27 kHz (54% FM deviation); see Fig.10 and note 18 Rx = 470 Rx = 0 Vo AF12(cl) fAF Vo/T V15 R12 V12 I12 max(sink) I12 max(source) B-3 AF output clipping signal voltage level frequency deviation temperature drift of AF output signal voltage DC voltage at decoupling capacitor output resistance DC output voltage maximum AC and DC output sink current maximum AC and DC output source current -3 dB video bandwidth without de-emphasis; short-circuit from pin 13 to pin 14 FM-PLL only; with 50 s de-emphasis; 27 kHz (54% FM deviation); "CCIR 468-4" fundamental wave and harmonics 50 s de-emphasis; AM: f = 1 kHz; m = 0.3 refer to 27 kHz (54% FM deviation) B/G standard FM-PLL in lock mode voltage dependent on VCO frequency; note 19 note 2 tracked with supply voltage THD < 1.5% THD < 1.5%; note 18 200 400 1.3 - - 1.2 - - - - 100 250 500 1.4 - 3x - -
1 2VP
300 600 - 53
mV mV V kHz
10-3
7x 3.0
10-3
dB/K V V mA mA kHz
100 - 1.1 1.1 -
- - 125
THD S/N (W)
total harmonic distortion weighted signal-to-noise ratio
- 55
0.15 60
0.5 -
% dB
c(rms) AM
residual sound carrier (RMS value) AM suppression
- 46
- 50
75 -
mV dB
12 V12
mute attenuation of AF signal DC jump voltage of AF output terminal for switching AF output to mute state and vice versa
70 -
75 50
- 150
dB mV
PSRR
power supply ripple rejection at Rx = 470 ; see Fig.8 pin 12
26
30
-
dB
1995 Sep 05
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. - TYP. -
TDA9806
MAX.
UNIT
AF performance for FM operation (B/G standard); notes 20, 21 and 22; see Table 1 S/N (W) weighted signal-to-noise ratio PC/SC ratio at pins 1 and 2; 27 kHz (54% FM deviation); "CCIR 468-4" black picture white picture 6 kHz sine wave (black to white modulation) sound carrier subharmonics; f = 2.75 MHz 3 kHz Notes 1. Values of video and sound parameters are decreased at VP = 4.5 V. 2. This parameter is not tested during production and is only given as application information for designing the television receiver. 3. Loop bandwidth BL = 60 kHz (natural frequency fn = 15 kHz; damping factor d = 2; calculated with sync level within gain control range). Resonance circuit of VCO: Q0 > 50; Cext = 8.2 pF 0.25 pF; Cint 8.5 pF (loop voltage approximately 2.7 V). 4. Temperature coefficient of external LC-circuit is equal to zero. 5. Vi IF = 10 mV (RMS); f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture video modulation. 6. Vi IF signal for nominal video signal. 7. Offset current measured between pin 7 and half of supply voltage (VP = 2.5 V) under the following conditions: no input signal at VIF input (pins 1 and 2) and VIF amplifier gain at minimum (V28 = VP). 8. Measurements taken with SAW filter G1962 (sound shelf: 20 dB); loop bandwidth BL = 60 kHz: a) modulation VSB; sound carrier off; fvideo > 0.5 MHz. b) sound carrier on; fvideo = 10 kHz to 10 MHz. 9. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p), in event of CVBS video amplifier output typical 1 V (p-p). If no sound trap is applied a 330 resistor must be connected from output to input (from pin 21 to pin 22). 10. The leakage current of the AGC capacitor should not exceed 1 A at B/G standard. Larger currents will increase the tilt. 11. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 10). B = 5 MHz weighted in accordance with "CCIR 567". 12. The intermodulation figures are defined: V 0 at 4.4 MHz 1.1 = 20 log ------------------------------------- + 3.6dB ; 1.1 value at 1.1 MHz referenced to black/white signal; V 0 at 1.1 MHz V 0 at 4.4 MHz 3.3 = 20 log ------------------------------------- ; 3.3 value at 3.3 MHz referenced to colour carrier. V 0 at 3.3 MHz 13. Response speed valid for a VIF input level range of 200 V up to 70 mV. 27 dB
45 45 40 35
51 51 46 40
- - - -
dB dB dB dB
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
TDA9806
14. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is given in Fig.6. The AFC-steepness can be changed by the resistors at pin 23. 15. Depending on the ratio C/C0 of the LC resonant circuit of VCO (Q0 > 50; see note 3; C0 = Cint + Cext). 16. The intercarrier output signal at pin 20 can be calculated by the following formula taking into account the video output signal at pin 21 (Vo video(p-p) = 1 V typical) as a reference:
V iSC ----------- ( dB ) + 6 dB 3 dB V iPC -------------------------------------------------------------20
1 V o ( rms ) = 1 V ( p - p ) x ---------- x 10 22
1 with ---------- = correction term for RMS value, 22 V iSC ----------- ( dB ) = sound-to-picture carrier ratio at VIF input (pins 1 and 2) in dB, V iPC 6 dB = correction term of internal circuitry and 3 dB = tolerance of video output and intercarrier output amplitude Vo(rms). V iSC Example: SAW filter G1962 (sound shelf: 20 dB) ----------- = - 27 dB Vo(rms) = 32 mV typical. V iPC 17. Input level for second IF from an external generator with 50 source impedance. AC-coupled with 10 nF capacitor, fmod = 1 kHz, 27 kHz (54% FM deviation) of audio references. A VIF input signal is not permitted. Pin 28 has to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at 50 s de-emphasis. a) Second IF input level 10 mV RMS. 18. Measured with an FM deviation of 27 kHz the typical AF output signal is 500 mV (RMS) (Rx = 0 ; see Fig.10). By using Rx = 470 the AF output signal is attenuated by 6 dB (250 mV RMS). For handling an FM deviation of more than 53 kHz the AF output signal has to be reduced by using Rx in order to avoid clipping (THD < 1.5%). For an FM deviation up to 100 kHz an attenuation of 6 dB is recommended with Rx = 470 . 19. The leakage current of the decoupling capacitor (2.2 F) should not exceed 1 A. 20. For all S/N measurements the used vision IF modulator has to meet the following specifications: a) Incidental phase modulation for black-to-white jump less than 0.5 degrees. b) Picture-to-sound carrier ratio; PC/SC = 13 dB (transmitter). c) Sound shelf of VIF SAW filter: minimum 20 dB. 21. Measurements taken with SAW filter K6256 (Siemens) for vision and sound IF (sound shelf: 20 dB). Input level Vi SIF = 10 mV (RMS), 27 kHz (54% FM deviation). 22. The PC/SC ratio at pins 1 and 2 is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC ratio. This PC/SC ratio is necessary to achieve the S/N (W) values as noted. A different PC/SC ratio will change these values. Table 1 Input frequencies and carrier ratios DESCRIPTION Picture carrier Sound carrier Picture-to-sound carrier ratio SYMBOL fPC fSC SC B/G STANDARD 38.9 33.4 13 UNIT MHz MHz dB
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Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
TDA9806
andbook, full pagewidth gain
70
MHA061
0.06
(dB) 60 Ituner (mA) 0 40
VIF input (1,2) (mV RMS) 0.6
50
30
(1) (2) (3) (4)
6
20
1.0
10
60
0 2.0 -10 1.0 1.5 2 2.5 3 3.5 4 V28 (V) 4.5
(1) Ituner; RTOP = 22 k. (2) Gain.
(3) Ituner; RTOP = 11 k. (4) Ituner; RTOP = 0 .
Fig.3 Typical VIF and tuner AGC characteristic.
handbook, halfpage
80
MED684
S/N (dB) 60
handbook, halfpage
3.2 dB 10 dB 13.2 dB 27 dB
13.2 dB 27 dB
40
20
SC CC
PC
SC CC
PC
BLUE
0 -60 0.06 -40 0.6 -20 6 10
YELLOW
MED685 - 1
0
20
Vi (VIF)(rms)(dB) 60 600 Vi (VIF)(rms)(mV)
SC = sound carrier, with respect to sync level. CC = chrominance carrier, with respect to sync level. PC = picture carrier, with respect to sync level. The sound carrier levels are taking into account a sound shelf attenuation of 20 dB (SWIF G1962).
Fig.4
Typical signal-to-noise ratio as a function of IF input voltage.
Fig.5 Input signal conditions.
1995 Sep 05
17
Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
TDA9806
handbook, full pagewidth
VP
VP = 5 V
V23 (V) 4.5 3.5 2.5
I 23 (A) 200 100 0 100 200
MHA055
22 k
(source current)
TDA9806 23
I 23 22 k
1.5 0.5
(sink current)
38.5
38.9
39.3 f (MHz)
Fig.6 Measurement conditions and typical AFC characteristic.
handbook, halfpage 2.6 V
2.5 V
zero carrier level white level
1.8 V 1.5 V
black level sync level
B/G standard
MHA056
Fig.7 Typical video signal levels on output pin 21 (sound carrier off).
handbook, full pagewidth
VP = 5 V VP = 5 V 100 mV (f ripple = 70 kHz)
TDA9806
MHA057
t
Fig.8 Ripple rejection condition.
1995 Sep 05
18
handbook, full pagewidth
1995 Sep 05
31 32 1
INTERNAL PIN CONFIGURATION
Philips Semiconductors
Multistandard VIF-PLL and FM-PLL demodulator
VP 30 n.c. + 29 28 +
GND 27 26 + 20 k 70 k + ++ 1 mA 10 k 10 k + + 20 k + 420 2.8 V 420 200 A 25 + 24 + + + 2.2 k + + 1.7 pF 9 k 1.7 pF 2.0 mA + 0.5 pF 10 k 1.6 k 1.9 mA 23 22 21 20
3.3 k
650
2 k 1 k 1 k
n.c.
19 2.5 mA
n.c. n.c. + + 18
19
3.6 V 1.1 k +
TDA9806
10 k 3.6 V 3.6 V
3.9 k 40 k 10 pF
640 40 k
17
2
1.1 k 0.6 A
n.c.
16
3.6 V 20 k VCO 23 A
+ + +
+ 2.3 mA 10 pF
9 k
+ 67 A
+
2.5 mA +
+
14.7 k + 25 pF 120
4.2 k 300 A 650 + +
Preliminary specification
n.c. n.c. n.c. 3 4 5 6 7
n.c. 8
n.c.
n.c. 10 11 12 13 14 15
MHA060
TDA9806
9
Fig.9 Internal circuitry.
handbook, full pagewidth
1995 Sep 05
VP 22 k 100 nF 22 k 330 23 22 21 20 19 AFC intercarrier output video output FM mute switch 10 nF tuner AGC 560 SFT 5.5 MHz n.c. 5.6 k 10 nF GND Q 0 50 n.c. n.c. n.c. VIF AGC 29 28 2.2 F 2.2 F 26 Cref 8.2 pF 32 31 30 27 25 24 18 17
TEST AND APPLICATION INFORMATION
Philips Semiconductors
Multistandard VIF-PLL and FM-PLL demodulator
TDA9806
20
1 2 3 n.c. 5 4 3 4 n.c. 5 n.c. TOP 22 k 6 7 8 9 10 11 12 13 14 15 16 1:1 VIF input 50 1 2 390 loop filter 220 nF CVBS n.c. n.c. n.c. 5.6 k AF output 22 F n.c. Rx
(1)
10 nF
C DEC
MHA058
Preliminary specification
TDA9806
(1) See note 18 of Chapter "Characteristics".
Fig.10 Test circuit.
handbook, full pagewidth
1995 Sep 05
VP 22 k AFC intercarrier output video output 100 nF 10 nF GND 8.2 pF 22 k FM mute switch 10 nF tuner AGC 560 5.5 MHz n.c. 5.6 k 330 15 H n.c. n.c. n.c. VIF AGC 29 28 2.2 F 2.2 F 26 Cref 32 31 30 27 25 24 23 22 21 20 19 18 17
Philips Semiconductors
Multistandard VIF-PLL and FM-PLL demodulator
TDA9806
1 2 3 n.c. IF input 50
(1)
21
4 n.c. 5 n.c. TOP SWIF G1962 22 k 6 7 390 loop filter 220 nF (1) Depends on standard. (2) See note 18 of Chapter "Characteristics".
8 n.c.
9 n.c.
10
11 n.c.
12
13
14
15
16
AF output
5.6 k 22 F
n.c. Rx
(2)
10 nF CVBS
C DEC
MHA059
Preliminary specification
TDA9806
Fig.11 Application circuit.
Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
PACKAGE OUTLINE SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)
TDA9806
SOT232-1
D seating plane
ME
A2 A
L
A1 c Z e b 32 17 b1 wM (e 1) MH
pin 1 index E
1
16
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 4.7 A1 min. 0.51 A2 max. 3.8 b 1.3 0.8 b1 0.53 0.40 c 0.32 0.23 D (1) 29.4 28.5 E (1) 9.1 8.7 e 1.778 e1 10.16 L 3.2 2.8 ME 10.7 10.2 MH 12.2 10.5 w 0.18 Z (1) max. 1.6
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT232-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-02-04
1995 Sep 05
22
Philips Semiconductors
Preliminary specification
Multistandard VIF-PLL and FM-PLL demodulator
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA9806
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1995 Sep 05
23
Philips Semiconductors - a worldwide company
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Internet: http://www.semiconductors.philips.com/ps/ For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 (from 10-10-1995: +31-40-2724825) SCD41 (c) Philips Electronics N.V. 1995
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
533061/1500/01/pp24 Document order number: Date of release: 1995 Sep 05 9397 750 00307

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